Electroplating is a process for depositing a metal layer on a work piece such as a semiconductor wafer. In conventional plating, a wafer is processed serially through three separate stages: pre-treatment, plating, and rinse.
After the wafer is prepared for electroplating in one or more pre-treatment cells in the pre-treatment stage, the wafer is transported to an electroplating cell in the plating stage.
In the electroplating cell, the wafer is immersed in a bath containing a solution of dissolved salts of the metal to be deposited. An anode and cathode terminal are provided in the bath with the wafer attached to the cathode. A direct current is applied between the anode and cathode causing the dissolved salts to chemically reduce and form the corresponding metal on portions of the wafer exposed to the current and solution.
After plating is completed, the wafer is removed from the solution bath. Sometimes, a small amount of rinsing (i.e., pre-rinsing) using ultra pure water is performed in the plating cell causing ultra pure water to enter the solution bath. However, the resulting dilution of the dissolved salt concentration in the bath limits the amount of rinsing in the plating cell. Therefore, the rinsing over the solution bath is incomplete. In this partially rinsed state, the wafer awaits transport to a separate cell in the rinsing stage for a more thorough rinse and dry.
One problem with this system is that often substantial time (e.g., minutes) elapses between the electroplating in the plating cell and the rinsing while the system awaits availability of a rinse cell, a transport system, or a human operator. Substantial time may elapse when, for example, there is throughput bottleneck in the rinse stage. During this time, solution molecules may stay attached to the wafer due to the relatively low surface energy of the solution. This allows the solution, in some cases, to chemically react with the elements of the wafer, particularly metallic elements. For example, a water-based salt solution tarnishes a copper work piece if exposed even for a short time. As circuit feature dimensions progress farther into the submicron range, such tarnishing can significantly reduce die yields.
Another problem with this system is that the plating cell cannot be used while the wafer awaits transport to the rinsing stage, leaving the plating cell underutilized.
Therefore, there is a clear need for a system that decreases the time lag between the plating and rinse stages.